Hardware security · Research & development
Cerastes is a research and development programme focused on hardened computing and the protection of sensitive cryptographic operations.
The programme explores how physical protection and dedicated security governance can complement cryptographic safeguards in demanding operating environments.
Our objective is to strengthen trust in the computing environment throughout its operational life. Detailed architectures and implementation information are reserved for confidential technical review.
QuadrionX focuses on research and development in hardened computing, hardware security, and cryptographic systems.
Our work seeks to connect strong cryptography with dependable physical protection and resilient computing environments.
jan.feliksiak@quadrionx.tech monica.feliksiak@quadrionx.dev
Public information is limited to the purpose and research scope of our programmes.
Detailed specifications, drawings, internal arrangements, security response logic, and operational parameters are not published on this website.
Requests for technical evaluation or partnership information can be directed to the contacts in About Us. Any release of confidential material is subject to appropriate review and confidentiality arrangements.
This page does not make jurisdiction-specific claims about patent filing status, priority, grant, or scope of protection.
Our research brings together mathematics, electrical engineering, cryptography, and resilient computing. We investigate how the physical environment of a machine influences the security of the operations it performs.
We study ways to complement cryptographic protection with assurance about the hardware and its operating environment.
We explore dedicated protection systems that reduce dependence on the general-purpose host and support informed security decisions.
We investigate continuity of protection under disrupted operating conditions, with attention to reliability and recovery.
We examine how hardened computing platforms can support the transition to post-quantum cryptography.
These are research objectives.
Secure Terminal is reserved for a future authorised-access service.
No sign-in or secure connection is available through this public page. Access enquiries can be directed to the contacts in About Us.
Answering NIST’s SUSHI appetizer, Cerastes delivers the Main Course of Continuous Trust.
Post-quantum cryptography addresses quantum threats to cryptographic algorithms. Protecting the hardware that executes them remains a complementary challenge.
NIST’s Sustainable Hardware Security workshop, SUSHI@NIST, brings together government, industry, and academia to advance hardware security and assurance throughout the semiconductor lifecycle.
Cerastes explores hardware-governed protection that reduces reliance on the host operating system, with the goal of maintaining trust throughout operation.
This public overview describes our development direction; proprietary implementation details are reserved for confidential review. References to NIST identify the wider research context and do not imply endorsement or certification.
Read about SUSHI@NIST
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